載入中...請稍候...

訂閱電子報


International Test Instruments 1480A USB2.0協議分析

  • 圖片 1
  • 圖片 2
Bookmark and Share


產品介紹

獨特的高級功能
 

  • 分層協議樹視圖有效組織捕獲的USB協議數據轉換成一種格式,恰好反映了總線上的實際的USB協議項的封包。這極大地簡化了USB協議的理解。大多數其他USB協議分析儀使用原始的塊型顯示器,這使它很難看到的複雜數據和整體層次。
  • 數據多個時間相關​​視圖,讓您輕鬆看見transcation,和總線上由最高至最低的抽象級別細節都一目了然。一些其他的USB協議分析儀要求您更改協議視圖在不同的抽象級別查看數據,導致您的位置喪失整體跟踪中情景意識。
  • 1480A解碼和顯示所有的總線事件到最詳細的差分D- / D +與NS 16.67分辨率。其他USB協議分析儀只能說明你更高級別的協議沒有查看的可能性去的最低水平總線狀態。
  • 一個非常細小和總線供電的設計便於攜帶和與筆記電腦使用(4.90“×4.10”×1.4“/8.8oz 或125×105×35 MM /250克)。

產品介紹

1480A USB2.0協議分析儀具有OTG解碼, 是專門USB道路設計的戰士。分析儀體積非常小,可以隨意放到你的上衣口袋或筆記本電腦包,僅略比鼠標大。其外殼採用了質量非常高的鋁拉絲。

捕獲的數據是實時傳送到PC裡進行分析,並通過電腦軟件顯示。該USB分析儀捕獲數據大小並沒有限制,因數據會被直接實時傳到PC應用程序解讀及在樹視圖顯示。這可以讓你捕捉數百MB的數據(僅局限於使用電腦上RAM的大小)。

1480A含有32MB FIFO緩衝器SDRAM,那可流暢捕獲突發流量,使得被測鏈路上暫時突發流量不會造成USB分析儀與分析PC鏈接飽和。持續最大捕捉速度至電腦很大程度上取決於捕獲PC的速度。注意:1480A USB分析儀永遠不會遺失捕獲的數據(不管被測線路是飽和的情況下),因為所捕獲的數據總是在緩衝SDRAM中,然後FIFO發送到個人電腦分析。

1480A USB協議分析儀是基於FPGA的,這使它能接受新軟件升級。使我們能夠在需要時遠程部署邏輯和軟件升級。這意味著你將永遠無需要把硬件發送給我們升級。

從USB分析儀硬件收到數據後實時進行解碼,然後才開始分析捕獲的數據及在電腦分析軟件顯示的數據。如USB事務和數據包被捕獲,它們將被解碼並加到PC分析軟件的樹視圖上。這使得更容易理解所捕獲數據的事件和次序。詳細細節只要對選定的交易和數據包樹視圖點擊。電腦分析軟件就會以十六進制格式的解碼,並在十六進制視圖窗格中顯示。

要了解更多關於電腦分析軟件,請點擊這裡 click here。該USB分析軟件是免費的。它包括LS,FS和HS的數據文件樣本,可以在軟件中查看,使您在購買USB硬件分析儀之前,能夠熟悉軟件

什麼是在箱子裡?

  • 1480A USB2.0協議分析儀。
  • 兩條3英尺(1M)的USB2.0線纜。
  • 安裝光盤包含驅動程序和軟件。

Technical Specifications

1480A LS/FS/HS USB Protocol Analyzer Technical Specifications.

Dimensions / Weight

4.90” x 4.10” x  1.4” / 8.8oz (125 x 105 x 35 mm / 250g)

Analysis PC Requirements

32-bit (x86) and 64-bit (x64) Windows versions (XP SP2 or newer). Pentium 4 or faster CPU is recommended.

   

Supported USB Standards

USB 1.0, USB 1.1, USB 2.0, OTG 1.3.

Supported USB Speeds

The 1480A automatically detects device connection in high speed (480 Mbps), full speed (12 Mbps), and low speed (1.5 Mbps).

Note: HS Devices are initially connected as FS devices. Only after successfully having completed the Device and Host Chirp Sequences do HS-capable devices enter HS mode. The 1480A fully supports automatic detection of both Device and Host Chirp.

Maximum recorded data length

Unlimited. Only the available disk and memory of the Analysis PC limits how much data can be captured and analyzed.

Built in FIFO buffer

32 MB. The FIFO buffer is used to smooth out the data stream captured from the Link Under Test. Note that the FIFO buffer will fill up if the Analysis PC is unable to read out data fast enough from the 1480A. In this case, the recording will automatically stop and the PC application will display the captured data up until the point where the FIFO filled up.

Analysis PC Interface

USB 2.0 Type "B" Connector

Link Under Test Interface

USB 2.0 Type "A" and "B" Connectors.

LED Indicators

  • Host Power: Indicates when the 1480A unit is powered and the Analysis PC Device Drivers have been installed.
  • Link Power: Indicates that the Link Under Test is powered by the Host.
  • Link Activity: Indicates when link activity is detected.

Captured bus events and packets

All bus activity down to the smallest detail is captured and stored into the .usb file when recording. The 1480A Software displays all the captured information from the lowest link level up to the highest protocol level. In addition the VBus voltage is continuously monitored and stored in the capture file.

For detailed information of the captured data, please see the datasheet for the NXP ISP1505A USB Transceiver.

Displayed Bus Events

LS Device Connection, FS Device Connection, HS Device Connection, Device Reset, Device Chirp, Host Chirp, Device Disconnection, HS Idle, Keep-Alives, OTG Session Request Protocol, OTG Host Negotiation Protocol and OTG VBus events.

Displayed Packets.

SETUP, IN, OUT, SOF, DATA0, DATA1, DATA2, MDATA, ACK, NAK, NYET, STALL, PING, SPLIT, PRE.

Displayed Transactions.

SETUP Transaction, IN Transaction, OUT Transaction, PING Transactions, SPLIT Transactions.

Decoded Device Requests

CLEAR_FEATURE, SET_FEATURE, SET_ADDRESS, GET_DESCRIPTOR, SET_DESCRIPTOR, GET_STATUS, GET_CONFIGURATION, SET_CONFIGURATION, GET_INTERFACE, SET_INTERFACE, SYNCH_FRAME.

Note: All Device Requests are captured and displayed but only standard Device Requests are decoded. I.e., non-standard Device Requests (not listed above) will be displayed in hexadecimal form.

Decoded Descriptors

Device Descriptor, Configuration Descriptor, Interface Descriptor, Endpoint Descriptor, String Descriptor, Device_Qualifier Descriptor, Other_Speed_Configuration Descriptor and OTG Descriptor.

Note: Class-specific descriptors are currently not decoded but instead displayed in hexadecimal form. Class Decoders, sold separately when available, will fully decode related class-specific descriptors.

Packet Integrity Checked

  • Token Packets: PID and CRC-5 errors are flagged as invalid.
  • Data Packets: CRC-16 errors are flagged as invalid.

在類別中尋找相似的產品

輸入您的產品評論

產品評論

這項未有任何評論

最近瀏覽...